With the rapid development of the semiconductor fabrication technology, the semiconductor chips are being developed into a higher integration level to obtain higher computing speed, higher data storage capacity, and more functionalities. With continuously increasing the integration level of the semiconductor chips, the feature size of the semiconductor devices has become smaller and smaller.
Three-dimensional integrated circuits (ICs) are formed using the advanced chip stacking technique to stack chips with different functions into ICs into three-dimensional structures. Comparing with two-dimensional ICs, the stacking technique of the three-dimensional ICs may not only shorten the signal transfer paths, but also speed up the three-dimensional ICs. Thus, the stacking technique of the three-dimensional ICs may match the requirements of the semiconductor devices for higher performance, smaller feature size, lower power consumption and more functions, etc.
Through Silicon Via (TSV) technique is a new generation interconnect technique to achieve the three-dimensional ICs; and is one of the key techniques of semiconductor manufacturing. The TSV technique is able to further shorten the signal transfer paths in the three-dimensional ICs, thus the speed of the three-dimensional ICs may be faster; and the number of the stacking chips may not be limited.
Comparing with the conventional stacking methods in the IC packaging and bonding process, the TSV technique is able to obtain a significantly large stacking density in three dimensions, and the size of the packaging structure formed by the TSV technique is substantially small. Thus, the speed of the chips is significantly improved; and the power consumption is reduced. Therefore, the TSV technique is a referred as a three-dimensional TSV technique. The major advantages of the TSV includes having the minimum size and weight, integrating various techniques into a single packaging structure; substituting the relatively long two-dimensional interconnect with a relative short perpendicular interconnect; and lowering the parasitic effect and the power consumption, etc.
However, the electrical properties the semiconductor structures formed by existing TSV techniques need further improvements. The disclosed device structures and methods are directed to solve one or more problems set forth above and other problems.